A replica bias regulator is a regulator that isolates the output of the regulator from the feedback loop of the regulator. This is done to ensure stability of the feedback loop of the overall regulator. If the output node was in the loop, the loop could become unstable due to widely varying and unpredictable currents drawn by the load. The output voltage is then designed to be a replica (copy) of the voltage formed in the feedback loop that does not have varying current.
A conventional replica bias regulator 10 is shown in FIG. 1 and comprises a simple replica bias regulator that has no adjustment for load regulation. In the conventional replica bias regulator of FIG. 1, the output signal (Vout) is taken from a replica output that is not connected in the feedback loop, thus isolating the output capacitance and load current from the feedback loop and ensuring stability of the overall circuit. As recognized by the present inventor, the problem with this architecture is the large load regulation that results from the change in voltage at this node due to a change in current. The output voltage drops as more current is pulled from the output. With large ranges of output currents, this architecture may not meet the output voltage requirements for all desired operating conditions. This phenomena is illustrated in FIG. 2.
FIG. 2 shows the output waveform with respect to load current of the conventional replica bias regulator for FIG. 1. The graph shows the output voltage (Vout) falling as the output current (Iout) increases. This is due to the increased gate-source voltage (Vgs) of the output transistor M2 required to supply the load current. Also shown is the line indicating the source voltage of transistor M1. This is the reference voltage set by feedback. The output waveform Vout moves around this reference/source voltage of M1 depending on the load current. The lower dashed horizontal line 12 represents the lower specified limit of Vout for the application. As the graph shows with the line 12, there is a maximum Iout that can be sourced before the output signal Vout falls below the specified limit across line 12. Conversely, if the output current drops (i.e., during a sleep mode or other low current mode), then the Vout signal rises above the specified limit shown by line 14.
One solution for this problem is to increase the size of the output transistor M2 to allow more current drive. However, when doing this, a new problem is created. The larger the transistor M2, the more sub-threshold current it sinks. This will cause the output to drift upward above the upper specification limit when very little or zero current is required from the regulator. This range of problems effects applications where large ranges of current are required such as those with standby modes and active modes.
As recognized by the present inventor, what is needed is a replica bias regulator that provides an output voltage characteristic that stays within the specified limits for all possible load currents that the regulator will have to supply.
It is against this background that various embodiments of the present invention were developed.